Texas Instruments SN74ACT240DW Handleiding

Texas Instruments Niet gecategoriseerd SN74ACT240DW

Lees hieronder de 📖 handleiding in het Nederlandse voor Texas Instruments SN74ACT240DW (26 pagina's) in de categorie Niet gecategoriseerd. Deze handleiding was nuttig voor 30 personen en werd door 2 gebruikers gemiddeld met 4.5 sterren beoordeeld

Pagina 1/26

SN54ACT240, SN74ACT240

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCAS515C − JUNE 1995 − REVISED OCTOBER 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D4.5-V to 5.5-V VCC Operation

DInputs Accept Voltages to 5.5 V

DMax tpd of 8.5 ns at 5 V

DInputs Are TTL Compatible

SN54ACT240 . . . J OR W PACKAGE

SN74ACT240 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 12 1311

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54ACT240 . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2 2OE

2Y1

GND

2A1 VCC

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

VCC

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

description/ordering information

These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state

memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The ’ACT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When

OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are

in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

TAPACKAGE†ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube SN74ACT240N SN74ACT240N

SOIC DW

Tube SN74ACT240DW

ACT240

40°C t 85°C

SOIC − DW Tape and reel SN74ACT240DWR ACT240

−40° °C to 85 C SOP − NS Tape and reel SN74ACT240NSR ACT240

SSOP − DB Tape and reel SN74ACT240DBR AD240

TSSOP − PW Tape and reel SN74ACT240PWR AD240

CDIP − J Tube SNJ54ACT240J SNJ54ACT240J

−55° °C to 125 C CFP − W Tube SNJ54ACT240W SNJ54ACT240W

LCCC − FK Tube SNJ54ACT240FK SNJ54ACT240FK

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

SN54ACT240, SN74ACT240

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCAS515C − JUNE 1995 − REVISED OCTOBER 2002

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

FUNCTION TABLE

(each buffer)

INPUTS OUTPUT

OE A

OUTPUT

L H L

L L H

H X Z

logic diagram (positive logic)

812

1A1

1A2

1A3

1A4

1Y1

1Y2

1Y3

1Y4

1OE 19

17 3

2A1

2A2

2A3

2A4

2Y1

2Y2

2Y3

2Y4

2OE

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through V

CC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg −65° °C to 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54ACT240, SN74ACT240

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCAS515C − JUNE 1995 − REVISED OCTOBER 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54ACT240 SN74ACT240

UNIT

MIN MAX MIN MAX UNIT

VCC Supply voltage 4.5 5.5 4.5 5.5 V

VIH High-level input voltage 2 2 V

VIL Low-level input voltage 0.8 0.8 V

VIInput voltage 0 VCC 0 VCC V

VOOutput voltage 0 VCC 0 VCC V

IOH High-level output current −24 −24 mA

IOL Low-level output current 24 24 mA

Δ Δt/ v 8 8 ns/VInput transition rise or fall rate

TAOperating free-air temperature −55 125 −40 85 C°

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

TA = 25°C SN54ACT240 SN74ACT240

UNIT

PARAMETER VTEST CONDITIONS CC MIN TYP MAX MIN MAX MIN MAX UNIT

I A50

4.5 V 4.4 4.49 4.4 4.4

IOH = −50 μA5.5 V 5.4 5.49 5.4 5.4

I 24 A

4.5 V 3.86 3.7 3.76

VOH IOH = −24 mA 5.5 V 4.86 4.7 4.76 V

IOH = −50 mA†5.5 V 3.85

IOH = −75 mA†5.5 V 3.85

I A50

4.5 V 0.001 0.1 0.1 0.1

IOL = 50 μA5.5 V 0.001 0.1 0.1 0.1

I 24 mA

4.5 V 0.36 0.5 0.44

VOL IOL = 24 mA 5.5 V 0.36 0.5 0.44 V

IOL = 50 mA†5.5 V 1.65

IOL = 75 mA†5.5 V 1.65

IOZ VO = VCC or GND 5.5 V ± ± ± μ0.25 5 2.5 A

IIVI = VCC or GND 5.5 V ± ± ± μ0.1 1 1 A

ICC VI = VCC or GND, IO = 0 5.5 V 4 80 40 Aμ

ΔICC‡One input at 3.4 V,

Other inputs at GND or VCC

5.5 V 0.6 1.6 1.5 mA

CiVI = VCC or GND 5 V 2.5 pF

CoVI = VCC or GND 5 V 8 pF

†Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.

‡This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or V

CC.

Product specificaties

Merk:	Texas Instruments
Categorie:	Niet gecategoriseerd
Model:	SN74ACT240DW
Breedte:	13 mm
Diepte:	7.6 mm
Hoogte:	2.35 mm
Breedte verpakking:	12.83 mm
Diepte verpakking:	507 mm
Hoogte verpakking:	5.08 mm
Soort:	Logic IC
Type verpakking:	SOIC
Aantal per verpakking:	25 stuk(s)
Temperatuur bij opslag:	-65 - 150 °C
Bedrijfstemperatuur (T-T):	-40 - 85 °C
Aantal pinnen:	20
Breedte (met pennen):	13 mm
Diepte (met pennen):	10.63 mm
Hoogte (met pennen):	2.65 mm