Texas Instruments SN74AC373PWR Handleiding


Lees hieronder de 📖 handleiding in het Nederlandse voor Texas Instruments SN74AC373PWR (27 pagina's) in de categorie Niet gecategoriseerd. Deze handleiding was nuttig voor 31 personen en werd door 2 gebruikers gemiddeld met 4.5 sterren beoordeeld

Pagina 1/27
SN54AC373, SN74AC373
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS540D − OCTOBER 1995 − REVISED OCTOBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D2-V to 6-V VCC Operation
DInputs Accept Voltages to 6 V
DMax tpd of 9.5 ns at 5 V
D3-State Noninverting Outputs Drive Bus
Lines Directly
DFull Parallel Access for Loading
description/ordering information
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in bus-organized systems without need for
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
ORDERING INFORMATION
TAPACKAGEORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube SN74AC373N SN74AC373N
SOIC DW
Tube SN74AC373DW
AC373
SOIC − DW Tape and reel SN74AC373DWR AC373
−40° °C to 85 C SOP − NS Tape and reel SN74AC373NSR AC373
40 C
to
85 C
SSOP − DB Tape and reel SN74AC373DBR AC373
TSSOP PW
Tube SN74AC373PW
AC373
TSSOP − PW Tape and reel SN74AC373PWR AC373
CDIP − J Tube SNJ54AC373J SNJ54AC373J
−55° °C to 125 C CFP − W Tube SNJ54AC373W SNJ54AC373W
55 C
to
125 C
LCCC − FK Tube SNJ54AC373FK SNJ54AC373FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright © 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D 8Q
4Q
GND
LE
V
CC
SN54AC373 . . . FK PACKAGE
(TOP VIEW)
SN54AC373 . . . J OR W PACKAGE
SN74AC373 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AC373, SN74AC373
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS540D − OCTOBER 1995 − REVISED OCTOBER 2003
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each latch)
INPUTS OUTPUT
OE LE D
OUTPUT
Q
L H H H
L H L L
L L X Q0
H X X Z
logic diagram (positive logic)
OE
LE
1D
1Q
1
11
3
2
To Seven Other Channels
C1
1D
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO
> VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65° °C to 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN54AC373, SN74AC373
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS540D − OCTOBER 1995 − REVISED OCTOBER 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54AC373 SN74AC373
UNIT
MIN MAX MIN MAX UNIT
VCC Supply voltage 2 6 2 6 V
VCC = 3 V 2.1 2.1
VIH High-level input voltage VCC = 4.5 V 3.15 3.15 V
VIH
VCC = 5.5 V 3.85 3.85
V
VCC = 3 V 0.9 0.9
VIL Low-level input voltage VCC = 4.5V 1.35 1.35 V
VIL
VCC = 5.5 V 1.65 1.65
V
VIInput voltage 0 VCC 0 VCC V
VOOutput voltage 0 VCC 0 VCC V
VCC = 3 V −12 −12
IOH High-level output current VCC = 4.5 V −24 −24 mA
IOH
VCC = 5.5 V −24 −24
mA
VCC = 3 V 12 12
IOL Low-level output current VCC = 4.5 V 24 24 mA
IOL
VCC = 5.5 V 24 24
mA
Δ Δt/ v 8 8 ns/VInput transition rise or fall rate
TAOperating free-air temperature −55 125 −40 85 C°
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
T
A = 25°C SN54AC373 SN74AC373
UNIT
PARAMETER VTEST CONDITIONS CC MIN TYP MAX MIN MAX MIN MAX UNIT
3 V 2.9 2.9 2.9
IOH = −50 μA4.5 V 4.4 4.4 4.4
V
IOH
50
A
5.5 V 5.4 5.4 5.4
V
VOH IOH = −12 mA 3 V 2.56 2.4 2.46 V
I 24 mA
4.5 V 3.86 3.7 3.76
IOH = −24 mA 5.5 V 4.86 4.7 4.76
3 V 0.1 0.1 0.1
IOL = 50 μA4.5 V 0.1 0.1 0.1
V
IOL
50
A
5.5 V 0.1 0.1 0.1
V
VOL IOL = 12 mA 3 V 0.36 0.5 0.44 V
I 24 mA
4.5 V 0.36 0.5 0.44
IOL = 24 mA 5.5 V 0.36 0.5 0.44
IIVI = VCC or GND 5.5 V ± ± ± μ0.1 1 1 A
IOZ VO = VCC or GND 5.5 V ± ± ± μ0.25 5 2.5 A
ICC VI = VCC or GND, IO = 0 5.5 V 4 80 40 Aμ
CiVI = VCC or GND 5 V 4.5 pF


Product specificaties

Merk: Texas Instruments
Categorie: Niet gecategoriseerd
Model: SN74AC373PWR
Breedte: 6.6 mm
Diepte: 4.5 mm
Hoogte: 1.05 mm
Breedte verpakking: 449 mm
Diepte verpakking: 853 mm
Hoogte verpakking: 35 mm
Soort: Logic IC
Type verpakking: TSSOP
Aantal per verpakking: 2000 stuk(s)
Temperatuur bij opslag: -65 - 150 °C
Bedrijfstemperatuur (T-T): -40 - 85 °C
Aantal pinnen: 20
Breedte (met pennen): 6.6 mm
Diepte (met pennen): 6.6 mm
Hoogte (met pennen): 1.2 mm

Heb je hulp nodig?

Als je hulp nodig hebt met Texas Instruments SN74AC373PWR stel dan hieronder een vraag en andere gebruikers zullen je antwoorden




Handleiding Niet gecategoriseerd Texas Instruments

Handleiding Niet gecategoriseerd

Nieuwste handleidingen voor Niet gecategoriseerd