Texas Instruments SN74F283N Handleiding

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SDFS069A − D2932, MARCH 1987 − REVISED OCTOBER 1993

Copyright  1993, Texas Instruments Incorporated

2−1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

•Full-Carry Look-Ahead Across the

Four Bits

•Systems Achieve Partial Look-Ahead

Performance With the Economy of Ripple

Carry

•Package Options Include Plastic

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

The ′F283 is a full adder that performs the addition

of two 4-bit binary words. The sum (Σ) outputs are

provided for each bit and the resultant carry (C4)

output is obtained from the fourth bit.

The device features full internal look-ahead

across all four bits generating the carry term C4 in

typically 5.7 ns. This capability provides the

system designer with partial look-ahead

performance at the economy and reduced

package count of a ripple-carry implementation.

The adder logic, including the carry, is

implemented in its true form. End-around carry

can be accomplished without the need for logic or

level inversion.

The ′F283 can be used with either all-active-high

(positive logic) or all-active-low (negative logic)

operands.

The SN54F283 is characterized for operation over

the full military temperature range of −55°C to

125°C. The SN74F283 is characterized for

operation from 0° °C to 70C.

logic symbol†

Σ

0

6

B1

0

5

A1

3

A2 14

A3

3

12

A4

2

B2

15

B3

3

11

B4

CI

7

C0

C4

9

CO

Σ1

4

0

1

13

10

3

Σ2

Σ3

Σ4

P

Q

Σ

†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

SN54F283. . . J PACKAGE

SN74F283. . . D OR N PACKAGE

(TOP VIEW)

3 2 12019

910 111213

4

5

6

7

8

18

17

16

15

14

A3

Σ3

NC

A4

B4

A2

Σ1

NC

A1

B1

SN54F283. . . FK PACKAGE

(TOP VIEW)

B2

Σ

NC

C4

4 B3

C0

GND

NC

NC − No internal connection

VCC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Σ2

B2

A2

Σ1

A1

B1

C0

GND

VCC

B3

A3

Σ3

A4

B4

Σ4

C4

2

Σ

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