Texas Instruments ADS62P15 Handleiding


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ADS62P15
www.ti.com
SLAS572C–OCTOBER2007–REVISEDFEBRUARY2012
DualChannel11-Bits,125MSPSADCWithParallelCMOS/DDRLVDSOutputs
CheckforSamples:ADS62P15
1
FEATURES
Referencealso
•64-QFNPackage(9mm×9mm)
•MaximumSampleRate:125MSPS
•PinCompatible14-bitand12-bitFamily
•11-BitResolutionWithNoMissingCodes
(ADS62P4X/ADS62P2X)
•84dBcSFDRatFin=50MHz
•67.1dBFSSNRatFin=50MHz
APPLICATIONS
•92dBCrosstalk
•WirelessCommunicationsInfrastructure
•ParallelCMOSandDDRLVDSOutputOptions
•SoftwareDefinedRadio
•3.5dBCoarseGainandProgrammableFine
•PowerAmplifierLinearization
Gainupto6dBforSNR/SFDRTrade-Off
•802.16d/e
•DigitalProcessingBlockWith:
•MedicalImaging
–OffsetCorrection
•RadarSystems
–FineGainCorrection,inStepsof0.05dB
•TestandMeasurementInstrumentation
–Decimationby2/4/8
–Built-inandCustomProgrammable24-Tap
Table1.ADS62PXXDualChannelFamily
Low/High/BandPassFilters
125MSPS105MSPS80MSPS65MSPS
•SupportsSine,LVPECL,LVDS&LVCMOS
ADS62P4X
ADS62P45ADS62P44ADS62P43ADS62P42
Clocks&AmplitudeDownto400mV
PP
(14bit)
ADS62P2X
•ClockDutyCycleStabilizer
ADS62P25ADS62P24ADS62P23ADS62P22
(12bit)
•InternalReference;SupportsExternal
(11bit)ADS62P15---
DESCRIPTION
ADS62P15isadualchannel11-bitA/Dconverterwithmaximumsampleratesupto125MSPS.Itcombineshigh
performanceandlowpowerconsumptioninacompact64QFNpackage.Usinganinternalsampleandholdand
lowjitterclockbuffer,theADCsupportshighSNRandhighSFDRathighinputfrequencies.Ithascoarseand
finegainoptionsthatcanbeusedtoimproveSFDRperformanceatlowerfull-scaleinputranges.
ADS62P15includesadigitalprocessingblockthatconsistsofseveralusefulandcommonlyuseddigital
functionssuchasADCoffsetcorrection,finegaincorrection(instepsof0.05dB),decimationby2,4,8and
in-builtandcustomprogrammablefilters.Bydefault,thedigitalprocessingblockisbypassed,anditsfunctions
aredisabled.
Twooutputinterfaceoptionsexist–parallelCMOSandDDRLVDS(DoubleDataRate).ADS62P15includes
internalreferenceswhiletraditionalreferencepinsandassociateddecouplingcapacitorshavebeeneliminated.
Nevertheless,thedevicecanalsobedrivenwithanexternalreference.Thedeviceisspecifiedovertheindustrial
temperaturerange(–40°Cto85°C).
1
Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas
Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
PRODUCTIONDATAinformationiscurrentasofpublicationdate.
Copyright©2007–2012,TexasInstrumentsIncorporated
ProductsconformtospecificationsperthetermsoftheTexas
Instrumentsstandardwarranty.Productionprocessingdoesnot
necessarilyincludetestingofallparameters.
Reference
Control
Interface
INA_P
INA_M
CLKP
CLKM
VCM
CLOCKGEN
SHA
SHA
INB_P
INB_M
Output
Clock
Buffer
Output
Buffers
ChannelA
DigitalProcessing
Block
ChannelA
DigitalProcessing
Block
ChannelB
Output
Buffers
ChannelB
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
DA10
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
CLKOUT
CMOSINTERFACE
Digital
Encoder
Digital
Encoder
11-BitADC
11-BitADC
11Bit
11Bit
11Bit
11Bit
AGND
AVDD
DRVDD
DRGND
RESET
SCLK
SEN
SDATA
CTRL1
CTRL2
CTRL3
ADS62P15
SLAS572C–OCTOBER2007–REVISEDFEBRUARY2012
www.ti.com
ThisintegratedcircuitcanbedamagedbyESD.TexasInstrumentsrecommendsthatallintegratedcircuitsbehandledwith
appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage.
ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore
susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications.
FUNCTIONALBLOCKDIAGRAM
2SubmitDocumentationFeedbackCopyright©2007–2012,TexasInstrumentsIncorporated
ProductFolderLink(s):ADS62P15
OFFSET
ESTIMATION
BLOCK
24TAPFILTER
-LOWPASS
-
HIGHPASS
-BANDPASS
DECIMATION
BY2/4/8
DISABLE
OFFSET
CORRECTION
FREEZE
OFFSET
CORRECTION
0
FINEGAIN
(0to6dB,0.5dB
steps)
GAIN
CORRECTION
(0.05dBsteps)
BYPASS
DECIMATION
BYPASS
FILTER
ToLVDSorCMOS
outputbuffers
11bits
11bits
11bits11bits
11bits
11bits
FromADC
output
FILTER
SELECTION
CLIPPER
DIGITAL
PROCESSINGBLOCK
ADS62P15
www.ti.com
SLAS572C–OCTOBER2007–REVISEDFEBRUARY2012
Figure1.DigitalProcessingBlockDiagram
PACKAGE/ORDERINGINFORMATION
(1)
SPECIFIEDTRANSPORT
PACKAGE-PACKAGELEAD/BALLPACKAGEORDERING
(2)
PRODUCTTEMPERATUREMEDIA,
LEADDESIGNATORFINISHMARKINGNUMBER
RANGEQUANTITY
ADS62P15RGCT250Tape/Reel
ADS62P15QFN-64RGC–40°Cto85°CCuNiPdAuAZ62P15
ADS62P15RGCR2000Tape/Reel
(1)Forthermalpadsizeonthepackage,seethemechanicaldrawingsattheendofthisdatasheet.θ
JA
=23.17°C/W(0LFMairflow),θ
JC
=22.1°C/Wwhenusedwith2oz.coppertraceandpadsoldereddirectlytoaJEDECstandardfourlayer3in.x3in.PCB.
(2)Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI
websiteatwww.ti.com.
ABSOLUTEMAXIMUMRATINGS
(1)
VALUEUNIT
Supplyvoltagerange,AVDD,DRVDD–0.3Vto3.9V
–0.3Vto3.9V
VoltagebetweenAGNDandDRGND–0.3to0.3V
VoltagebetweenAVDDtoDRVDD–0.3to3.3V
V
SS
Voltageappliedtoexternalpin,CM(inexternalreferencemode)-0.3to2V
–0.3Vtominimum
Voltageappliedtoanaloginputpins,INA_P,INA_M,INB_P,INB_MV
(3.6,AVDD+0.3V)
Voltageappliedtoclockinputpins,CLKP,CLKM–0.3VtoAVDD+0.3VV
T
A
Operatingfree-airtemperaturerange–40to85°C
T
J
Operatingjunctiontemperaturerange125°C
T
stg
Storagetemperaturerange–65to150°C
(1)Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings
onlyandfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating
conditionsisnotimplied.Exposuretoabsolutemaximumratedconditionsforextendedperiodsmayaffectdevicereliability.
Copyright©2007–2012,TexasInstrumentsIncorporatedSubmitDocumentationFeedback3
ProductFolderLink(s):ADS62P15

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Model: ADS62P15

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