Microchip SR087DB1 Handleiding

Microchip Niet gecategoriseerd SR087DB1

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Supertex inc.
Supertex inc.
www.supertex.com
SR087DB1
Doc.# DSDB-SR087DB1
A032014
Board Layout and Connection Diagram
Inductorless Switching Off-line
Power Supply Demoboard
Specications
Parameter Value
AC Input (VIN): 90 to 270VAC
45Hz to 65Hz
Output voltages:
VOUT (no load)
VREG
12.6V ± 8%1
5.0V ± 5%
Output current, max:
IREG
IOUT + IREG
120VAC
60mA
100mA
230VAC
60mA
60mA
Efciency, typ.2 (full load): 52% 44%
Standby power, typ. (no load): 62mW 200mW
Introduction:
The Supertex SR087DB1 is an inductorless switching power
supply intended for operation directly from a 120/230VAC
line. Two outputs, 12.6V and 5.0V are provided.
The operating principle is to turn on a pass transistor when
the rectied AC input is below the output voltage, and to turn
it off when the output storage capacitor is charged up to the
regulation point. Since the output capacitor charges up on
the rising edge of a sine wave, reasonable efciencies can
be obtained without the use of magnetics.
Instructions on page 2 and 3 describe how the demoboard
may be modied to better suit applications that are not satis-
ed by the board as provided. For a full description of the
SR087, see the SR087 datasheet.
Notes:
1. Adjustable from 9.0V to 50V.
2. Referenced to V
OUT.
+
D1
Z1
F1 C2
R5
Q1
R2
R3
R4 C3
~ ~
R1
R7
C4
R6 C1
C5
R8
-
WARNING!!!
Do not connect earth-grounded loads
or test instruments. Doing so will short
the AC line, resulting in damage to the
instrument, load, and/or the SR087 circuit.
U ese floating instruments or high voltag
differential probes. Do not use a
transformer on the AC line.
WARNING!!!
No galvanic isolation.
Dangerous voltages are
present when connect to
the AC line.
VIN
90 - 270VAC
50/60Hz
VOUT
(12.6V)
VREG (5.0V)
ENABLE
GND
Terminal blocks J1 and J2 may be removed by pulling straight up.
J1
J2
Supertex SR087DB1
Warning! No galvanic isolation.
Dangerous voltages are present.
Do not connect grounded loads
or test equipment. Do not use
a transformer on the AC line.
VIN
EN
GND
VREG
VOUT
IC1
2
SR087DB1
Supertex inc.
www.supertex.com
Doc.# DSDB-SR087DB1
A032014
Schematic
VGDVIN GATE VOUT
GND
FB
VREG
VOUT
12.6VDC
VIN
90 to 270VAC
50/60Hz
EN
C1
100nF
C2
1.0µF
R7
20kΩ
D1
1.0kV, 1.0A
Z1
275V
50A
F1
1.25A
EN
Q1
STGD5NB120SZ
1
2
4
3
5
6
7
8
SR087
C5
optional EMI
supressor
GND
do not
connect to
earth
ground!
VIN
R2
200kΩ
R1
200kΩ R3
510kΩ
R4
510kΩ
R8
0Ω
not installed
C3
470µF
C4
100nF
VREG
5.0VDC
R6
12.4kΩ
R5
113kΩ
VIN - Connect to a 120/230VAC line. The AC input is pro-
tected by a 275V metal oxide varistor (MOV) and a 1.25A
slow-blow fuse.
Do not use a transformer on the input line. The high induc-
tance creates inductive kickback, which can overload the
MOV.
The SR087DB1 will not operate from uninterruptible power
supplies having a square wave output. This type of output is
usually referred to as “modied sine wave”.
GND - Circuit common. Since galvanic isolation is not pro-
vided, connecting this point to an earth-grounded instrument,
(such as an oscilloscope), will short the AC line, resulting in
circuit and/or instrument damage.
Also note that GND may be at a higher potential with respect
to earth ground, even if the AC is switched off. Use cau-
tion!
VOUT - The main output. No-load output voltage is 12.6V.
Because the VOUT storage capacitor (C3) recharges twice
per input cycle, this output will have a certain amount of
100/120Hz ripple, depending upon the load. The SR087
regulates the peak output voltage, not the average, thus the
average voltage will decrease under load.
VOUT is adjustable from 9.0 to 50V. See the modications
section on page 3. A source-only external voltage may be
applied to this output.
Do not connect earth-grounded loads or instruments!
VREG - The regulated output, 5.0V nominal output voltage.
VREG
is the output of a linear regulator internal to the SR087,
which in turn is supplied by VOUT. Thus any load on VREG is ef-
fectively a load on VOUT
. VREG requires at least 4.0V of head-
room to operate. Being a linear regulator, the SR087 will dis-
sipate power as IREG
is increased, up to 460mW at 60mA.
Enable - A logic low (<0.2V) enables Q 1
switching. A logic
high (>0.75 • VREG) disables Q1, shutting down VOUT and thus
VREG
. However, if an external voltage is applied to VOUT when
disabled, VREG will continue to function and provide a 5.0V
output.
The input has 20kΩ pull-down. If unused, Enable should be
left unconnected or connected to ground.
Connections:
3
SR087DB1
Supertex inc.
www.supertex.com
Doc.# DSDB-SR087DB1
A032014
Output Voltage
VOUT may be adjusted in the range of 9.0 to 50V1 by chang-
ing feedback resistor R5 according to the following equation.
Keep in mind that the peak output voltage is regulated, not
the average, therefore the average output voltage will de-
crease (and ripple increase) with increased loads.
R5 = R6 • [(VOUT/1.25V) - 1] EQ. 1
Leave R6 at 12.4kΩ - it assures a minimum 100µA load re-
quired for the proper operation of the SR087. Change R 3
and R4 according to the equation 4. It may be necessary to
replace C2 and C3 with capacitors having a higher voltage
rating. For C3, use a low ESR capacitor with an adequate
ripple current rating (800mArms). Use ceramic for C2.
Since VREG is a linear regulator supplied from VOUT, the maxi-
mum current available from VREG is reduced as VOUT is in-
creased due to power considerations.
IREG(MAX) = 1.5W EQ. 2
VOUT - 3.3V
or 60mA, whichever is less.
Output Ripple
Storage capacitor C3 was sized to provide about 2VP-P ripple
at 100mA combined load (IOUT + IREG). For lighter loads, C3
may be reduced. Conversely, C3 may be increased for low-
er ripple. Use a low ESR capacitor with an adequate ripple
current rating (measure using a current probe). Efciency
and output current capability may drop with increased ca-
pacitance because of a smaller conduction angle associated
with lower ripple. Due to feedback hysteresis, ripple cannot
be reduced below 4%.
VRIPPLE (P - P) ≈
IOUT + IREG EQ. 3
2fINC3
Input Voltage
To reduce standby power for 230VAC-only applications, or
for supply voltages less than 90Vrms, R1 and R4 should be
changed according to equation 4 below. R 1+ R2 should re-
main at 400kΩ.
R2 and R4 are employed to ensure adequate creepage dis-
tances and resistor voltage ratings for 230VAC operation.
For 120VAC-only applications they may be omitted (replaced
with shorts), with R1 = 1.0MΩ and R3 = 430kΩ.
Conducted EMI
As supplied, the SR087DB1 meets 47CFR Part 15 Class B
and CISPR 14-1 requirements for conducted emissions at
combined load currents (IOUT + IREG) of less than 20mA. For
higher load currents, an RC network (R8 & C5) can be used
before the IGBT gate to slow down the falling edge. This has
the effect of reducing harmonics, lowering conducted EMI.
Suggested values of 22kΩ and 390pF allow the SR087DB1
to meet EMI requirements at combined load currents of
60mA for 120VAC and 40mA for 230VAC.
Slowing down the falling edge results in the output voltage
overshooting the intended regulation point, causing the peak
VOUT
voltage to be higher than expected. This may be com-
pensated for by entering a slightly lower value for VOUT into
equation 1 when selecting feedback resistors. Slowing down
the falling edge also increases switching losses, resulting in
slightly decreased efciency.
R3 + R4 Equation
Eq. 4
Use the minimum anticipated RMS value for VIN. Take re-
sistor tolerance into account, selecting the next lower stan-
dard value. Choosing a lower value has no effect other than
slightly higher standby power.
Modications
Note:
1. VREG requires at least 4.0V of headroom to provide 3.3V. Therefore V
OUT, including ripple and tolerance, must not fall below 7.3V.
(R3 + R4)
<
where
VX = VOUT + 15V
√ 2VIN
2 - VX
2 - VX cos-1
V
X
√2 VIN
π • 25µA

Product specificaties

Merk: Microchip
Categorie: Niet gecategoriseerd
Model: SR087DB1

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