Texas Instruments LSF0002 Handleiding

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LSF0002 Ultra-Small Auto-Bidirectional Translator

for Open Drain or Push Pull Applications

1 Features

•Provide bidirectional voltage translation with no

direction pin needed (V

EXTA

needs to be 0.8V less

than V

EXTB

for best signal integrity)

•Supports switch configuration implementation

when V

EXTA

= V

EXTB

•Supports up to 100MHz up translation and greater

than 100MHz down translation at

≤ 30pF capacitive load and up To 40MHz up or

down translation at 50pF capacitive load

•Allows bidirectional voltage-level translation

between

–0.95V ↔ 1.8/2.5/3.3/5V

–1.2V ↔ 1.8/2.5/3.3/5V

–1.8V ↔ 2.5/3.3/5V

–2.5V ↔ 3.3/5V

–3.3V ↔ 5V

•Low standby current

•5V tolerance I/O port to support TTL

•Low R

ON

provides less signal distortion

•High-impedance I/O pins for EN = Low

•Flow-through pinout for easy PCB trace routing

•Latch-up performance >100mA per JESD 17

•–40°C to 125°C operating temperature range

2 Applications

•GPIO, MDIO, PMBus, SMBus, SDIO, UART, I

2

C,

and other interfaces in telecom infrastructure

•Enterprise systems

•Communications equipment

•Personal electronics

•Industrial applications

3 Description

The LSF0002 supports bidirectional voltage

translation without the need for DIR pin, which

minimizes system effort (for PMBus, I

2

C, SMBus, and

so forth). The LSF family of devices supports up

to 100MHz up translation and greater than 100MHz

down translation at ≤ 30pF capacitive load and up

to 40MHz up or down translation at 50pF capacitive

load, which allows the LSF family to support more

consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5V tolerance on I/O port, which

makes it compatible with TTL levels in industrial and

telecom applications. The LSF family can set up

different voltage translation levels, which makes it

very flexible.

Unlike the LSF0x0x family, the LSF0002 does not

require VREF_A and VREF_B power supplies and the

200kΩ bias resistor. The LSF0002 utilizes the V

BIAS

pin that enables translation by being biased to the

same voltage as the lower power supply at the I/Os

that is being translated to and from.

Package Information

PART NUMBERPACKAGE

(1)

PACKAGE SIZE

(2)

LSF0002DTQ (X2SON, 6)1mm × 0.8mm

(1)For more information, see Section 11.

(2)The package size (length × width) is a nominal value and

includes pins, where applicable.

SW

VBIAS

6

B1

SW

A1

B2A2

2

3

5

4

GND

1

Functional Block Diagram

LSF0002

SDLS975A – APRIL 2024 – REVISED SEPTEMBER 2025

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Product specificaties