Texas Instruments ADS8588H Handleiding

ADS8588H 16-Bit, 500-kSPS, 8-Channel, Simultaneous-Sampling ADC With

Bipolar Inputs on a Single Supply

1 Features

•16-bit ADC with integrated analog front-end

•Simultaneous sampling: 8 channels

•Pin-programmable bipolar inputs: ±10 V and ±5 V

•High input impedance: 1 MΩ

•5-V analog supply: 2.3-V to 5-V I/O supply

•Overvoltage input clamp with 9-kV ESD

–Max offset drift: 3 ppm/°C

–Gain drift: 6 ppm/°C

•On-chip digital filter for oversampling

•Flexible parallel, byte, and serial interface

•Temperature range: –40°C to +125°C

•Package: LQFP-64

2 Applications

•Substation automation

•Multifunction relay

•Battery energy storage system

3 Description

The ADS8588H is an 8-channel, integrated

data acquisition (DAQ) system based on a

16-bit successive approximation (SAR) analog-to-

digital converter (ADC). All input channels are

simultaneously sampled to achieve a maximum

throughput of 500 kSPS per channel. The device

with a buffer to drive the ADC. A flexible digital

interface supporting serial, parallel, and parallel byte

communication enables the device to be used with a

variety of host controllers.

The ADS8588H can be configured to accept ±10-V or

±5-V true bipolar inputs using a single 5-V supply. The

high input impedance allows direct connection with

sensors and transformers, thus eliminating the need

for external driver circuits.

Package Information

Table of Contents

1 Features............................................................................1

2 Applications.....................................................................1

3 Description.......................................................................1

4 Revision History..............................................................2

5 Pin Configuration and Functions...................................3

6 Specifications..................................................................6

6.1 Absolute Maximum Ratings........................................6

6.2 ESD Ratings...............................................................6

Operation, CS and RD Tied Together..........................10

6.9 Timing Requirements: Parallel Data Read

Operation, CS and RD Separate.................................11

6.10 Timing Requirements: Serial Data Read

Operation.....................................................................11

6.11 Timing Requirements: Byte Mode Data Read

Operation.....................................................................11

6.12 Timing Requirements: Oversampling Mode............11

6.13 Timing Requirements: Exit Standby Mode..............12

6.14 Timing Requirements: Exit Shutdown Mode...........12

6.17 Switching Characteristics: Parallel Data Read

Operation, CS and RD Separate.................................13

6.18 Switching Characteristics: Serial Data Read

Operation.....................................................................13

6.19 Switching Characteristics: Byte Mode Data

Read Operation...........................................................14

6.20 Timing Diagrams.....................................................14

6.21 Typical Characteristics............................................18

8.1 Application Information.............................................48

8.2 Typical Application....................................................48

8.3 Power Supply Recommendations.............................51

8.4 Layout.......................................................................52

9 Device and Documentation Support............................55

9.1 Documentation Support............................................55

9.2 Receiving Notification of Documentation Updates....55

9.3 Support Resources...................................................55

9.4 Trademarks...............................................................55

9.5 Electrostatic Discharge Caution................................55

•Added links to Applications section....................................................................................................................1

•Deleted high performance and accuracy discussion from Description section..................................................1

•Changed minimum SCLK time period from 50 ns to 20 ns in Timing Requirements: Serial Data Read

Operation table..................................................................................................................................................11

•Changed the magnitude response plot for third-order LPF in the Third-Order LPF Magnitude Response figure

..........................................................................................................................................................................27

•Changed typical conversion time of OSR mode operation in OSR Mode Operation Timing Diagram figure...44

ADS8588H

SBAS843A – SEPTEMBER 2017 – REVISED JULY 2023

5 Pin Configuration and Functions

Figure 5-1. PM Package, 64-Pin LQFP (Top View)

Table 5-1. Pin Functions

PIN

TYPE

(1)