Texas Instruments ADS8671 Handleiding
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ADS867x 14-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System
With Programmable, Bipolar Input Ranges
1 Features
•14-bit ADC with integrated analog front-end
•High speed:
–ADS8671: 1 MSPS
–ADS8675: 500 kSPS
•Software programmable input ranges:
–Bipolar ranges: ±12.288 V, ±10.24 V, ±6.144 V,
±5.12 V, and ±2.56 V
–Unipolar ranges: 0 V–12.288 V, 0 V–10.24 V,
0 V–6.144 V, and 0 V–5.12 V
•5-V analog supply: 1.65-V to 5-V I/O supply
•Constant resistive input impedance ≥ 1 MΩ
•Input overvoltage protection: up to ±20 V
•On-chip, 4.096-V reference with low drift
•Excellent performance:
–DNL: ±0.25 LSB; INL: ±0.4 LSB
–SNR: 84.5 dB; THD: –105 dB
•ALARM → high, low threshold
•multiSPI
™
interface with daisy-chain
•Extended industrial temperature range:
–40°C to +125°C
2 Applications
•Analog input modules
•Mixed modules (AI, AO, DI, DO)
•Data acquisition (DAQ)
•Trackside signaling and control
3 Description
The ADS8671 and ADS8675 belong to a family of
integrated data acquisition system based on a
successive approximation (SAR) analog-to-digital
converter (ADC). The devices feature a high-speed,
high-precision SAR ADC, integrated analog front-end
(AFE) input driver circuit, overvoltage protection circuit
up to ±20 V, and an on-chip 4.096-V reference with
extremely low temperature drift.
The devices operate on a single 5-V analog supply,
but support true bipolar input ranges of ±12.288 V,
±6.144 V, ±10.24 V, ±5.12 V, and ±2.56 V, as well as
unipolar input ranges of 0 V to 12.288 V, 0 V to
10.24 V, 0 V to 6.144 V, and 0 V to 5.12 V. The gain
and offset errors are accurately trimmed within the
specified values for each input range to ensure high
dc precision. The input range selection is done by
software programming of the device internal registers.
The devices offer a high resistive input impedance
(≥ 1 MΩ) irrespective of the selected input range.
The multiSPI digital interface is backward-compatible
to the traditional SPI protocol. Additionally,
configurable features simplify interface to a wide
range of host controllers.
Device Information
(1)
PART NUMBERPACKAGEBODY SIZE (NOM)
ADS866xTSSOP (16)5.00 mm × 4.40 mm
(1)For all available packages, see the orderable addendum at
the end of the data sheet.
Oscillator
CONVST/CS
PGA
1 M:
OVP
1 M:
OVP
2
nd
-Order
LPF
ADC
Driver
V
BIAS
AIN_P
AIN_GND
4.096-V
Reference
REFGND
DGNDAGND
DVDD
AVDD
Digital Logic
and Interface
REFIO
REFCAP
SCLK
SDI
SDO
14-Bit
SAR ADC
ADS867x
Block Diagram
www.ti.com
ADS8671, ADS8675
SBAS779B – DECEMBER 2016 – REVISED MARCH 2021
Copyright ©2021 Texas Instruments Incorporated
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Product Folder Links: ADS8671ADS8675
ADS8671, ADS8675
SBAS779B – DECEMBER 2016 – REVISED MARCH 2021
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History..............................................................2
5 Pin Configuration and Functions...................................4
6 Specifications..................................................................5
6.1 Absolute Maximum Ratings........................................5
6.2 ESD Ratings...............................................................5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Timing Requirements: Conversion Cycle..................10
6.7 Timing Requirements: Asynchronous Reset.............10
6.8 Timing Requirements: SPI-Compatible Serial
Interface......................................................................10
6.9 Timing Requirements: Source-Synchronous
Serial Interface (External Clock)..................................11
6.10 Timing Requirements: Source-Synchronous
Serial Interface (Internal Clock)...................................11
6.11 Timing Diagrams.....................................................12
6.12 Typical Characteristics............................................15
7 Detailed Description......................................................22
7.1 Overview...................................................................22
7.2 Functional Block Diagram.........................................22
7.3 Feature Description...................................................23
7.4 Device Functional Modes..........................................35
7.5 Programming............................................................40
7.6 Register Maps...........................................................48
8 Application and Implementation..................................57
8.1 Application Information.............................................57
8.2 Typical Application....................................................57
9 Power Supply Recommendations................................60
9.1 Power Supply Decoupling.........................................60
9.2 Power Saving............................................................60
10 Layout...........................................................................62
10.1 Layout Guidelines...................................................62
10.2 Layout Example......................................................63
11 Device and Documentation Support..........................64
11.1 Documentation Support..........................................64
11.2 Receiving Notification of Documentation Updates..64
11.3 Support Resources.................................................64
11.4 Trademarks.............................................................64
11.5 Electrostatic Discharge Caution..............................64
11.6 Glossary..................................................................64
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (October 2018) to Revision B (March 2021)Page
•Updated the numbering format for tables, figures, and cross-references throughout the document .................1
•Changed Applications section............................................................................................................................1
•Changed AIN_P, AIN_GND to GND specification in Absolute Maximum Ratings table ....................................5
•Updated specification of Input Overvoltage Protection Circuit, V
OVP
parameter, to ±15 V for test condition
AVDD = floating..................................................................................................................................................6
•Changed Standard SPI Timing Protocol figures...............................................................................................46
•Changed DEVICE_ADDR[3:0] type to R/W from R in DEVICE_ID_REG Register .........................................48
•Changed the description of PAR_EN bit in DATAOUT_CTL_REG Register ...................................................52
Changes from Revision * (December 2016) to Revision A (October 2018)Page
•Deleted per channel from ALARM → High, Low Threshold bullet in Features section......................................1
•Deleted WQFN package option from document.................................................................................................1
•Deleted RUM (WQFN) information from Pin Configuration and Functions section ...........................................4
•Deleted offers a low impedance of 30 kΩ from footnotes 2 and 3 in Absolute Maximum Ratings table ...........5
•Deleted RUM (WQFN) column from Thermal Information table.........................................................................5
•Changed test conditions of Input Overvoltage Protection Circuit, V
OVP
parameter............................................6
•Deleted WQFN row from V
REFIO
and dV
REFIO
/dT
A
parameters..........................................................................6
•Deleted multichannel reference from Overview section...................................................................................22
•Changed the input voltage range for each analog channel to the input voltage range in Analog Input Structure
section..............................................................................................................................................................23
•Changed Input Overvoltage Protection Limits When AVDD = 5 V table name from Input Overvoltage
Protection Limits When AVDD = 5 V or Offers a Low Impedance of 30 kΩ .....................................................23
•Changed AVDD is floating with an impedance 30 kΩ to AVDD is floating in Input Protection Circuit section..23
ADS8671, ADS8675
SBAS779B – DECEMBER 2016 – REVISED MARCH 2021
www.ti.com
2Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: ADS8671 ADS8675
•Changed Input Overvoltage Protection Limits When AVDD = Floating table title from Input Overvoltage
Protection Limits When AVDD = Floating with Impedance 30 kΩ ...................................................................23
•Deleted RUM (WQFN) package information from Internal Reference section.................................................27
•Deleted RUM (WQFN) package information from External Reference section................................................30
•Added footnotes to List of Input Commands table............................................................................................42
www.ti.com
ADS8671, ADS8675
SBAS779B – DECEMBER 2016 – REVISED MARCH 2021
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: ADS8671 ADS8675
Product specificaties
| Merk: | Texas Instruments |
| Categorie: | Niet gecategoriseerd |
| Model: | ADS8671 |
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