Microchip PIC24F08KM102 Handleiding
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PIC24F08KM102
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© 2007-2017 Microchip Technology Inc. DS30009715D-page 1
PIC24F Flash Program Memory
HIGHLIGHTS
This section of the manual contains the following major topics:
1.0 Introduction ....................................................................................................................... 2
2.0 Program Memory Architecture .......................................................................................... 2
3.0 Table Operation Instructions ............................................................................................. 8
4.0 Flash Memory Programming........................................................................................... 13
5.0 Program Space Visibility and Extended Data Space (PSV and EDS)............................. 21
6.0 Error Correcting Code (ECC) .......................................................................................... 21
7.0 Low-Power Operation ..................................................................................................... 21
8.0 Register Map................................................................................................................... 22
9.0 Related Application Notes............................................................................................... 23
10.0 Revision History .............................................................................................................. 24
dsPIC33/PIC24 Family Reference Manual
DS30009715D-page 2 © 2007-2017 Microchip Technology Inc.
1.0 INTRODUCTION
All PIC24F devices have an internal programmable Flash array for the execution of user code.
The high-endurance Flash array provides great flexibility in code development and storage,
combining a long retention life with a high number of read/write cycles.
2.0 PROGRAM MEMORY ARCHITECTURE
PIC24F devices address a 4M x 24-bit program memory address space, as shown in Figure 2-1.
The program memory map is equally divided into the user memory space (000000h to 7FFFFFh)
and the configuration (or test) memory space (800000h to FFFFFFh).
The user program space contains the Reset vector, Interrupt Vector Tables (IVTs) and program
memory. There are three methods for accessing program space:
1. The 23-bit Program Counter (PC).
2. Table Read (TBLRD) and Table Write (TBLWT) instructions.
3. By mapping any 32-Kbyte segment of program memory into the data memory
address space.
Implemented program memory can be further divided into the vector area, which includes the
Reset and interrupt vectors, and the code area, which also includes the Flash configuration data.
Accessing unimplemented areas of the user program space (i.e., above the upper implemented
boundary of program memory) will cause an illegal address trap.
Note: This family reference manual section is meant to serve as a complement to device
data sheets. Depending on the device variant, this manual section may not apply to
all PIC24F devices.
Please consult the note at the beginning of the “Flash Program Memory” chapter
in the current device data sheet to check whether this document supports the
device you are using.
Device data sheets and family reference manual sections are available for
download from the Microchip Worldwide Web site at: http://www.microchip.com
© 2007-2017 Microchip Technology Inc. DS30009715D-page 3
PIC24F Flash Program Memory
Figure 2-1: Default Program Space Memory Map for PIC24F Devices
000000h
FEFFFEh
FFFFFFh
00xx00h(1)
00xxFEh(1)
Configuration Memory Space User Memory Space
Legend: Memory areas are not shown to scale.
Note 1: The vector area extends to 0000FEh in devices with original IVT mapping. See text and Figure 2-2 for the lower
boundary of the vector area in devices with newer IVT mapping.
2: Exact boundary addresses are determined by the size of the implemented program memory and number of
Configuration registers.
3: Devices with J-Flash program memory only. See Section 2.3 “Flash Configuration Data (PIC24FJ Devices
Only)” for more information.
4: Not all devices have memory-mapped write latches. Refer to the specific device data sheet for details, including
number of latches implemented and upper address boundary.
DEVID (2)
Reserved
FF0000h
800000h
7FFFFEh
Reserved
xxxx00h (2)
xxxxFEh(2)
Unimplemented
Read ‘
0
’
FF0002h
FF0004h
F7FFFEh
F80000h
F800xxh (2)
F800xxh (2)
Device Configuration Registers
F9FFFEh
FA0000h
FA00xxh
FA00xxh
Flash Write Latches (Mapped)
(4)
Vector Area
User Flash Program Memory
Flash Configuration Words
(3)
Product specificaties
| Merk: | Microchip |
| Categorie: | Niet gecategoriseerd |
| Model: | PIC24F08KM102 |
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