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ATtiny87/167 Automotive
Automotive Silicon Errata and Data Sheet Clarifications
Introduction
The ATtiny87/167 Automotive devices you have received conform functionally to the current device data sheet
(www.microchip.com/mymicrochip/filehandler.aspx?ddocname=en590544), except for the anomalies described in this
document. The errata described in this document will likely be addressed in future revisions of the ATtiny87/167
Automotive devices.
Note:
• This document summarizes all the silicon errata issues from all revisions of silicon, previous and current.
© 2021 Microchip Technology Inc.
and its subsidiaries
Errata DS80000970A-page 1
1. Silicon Issue Summary
Legend
-Erratum is not applicable.
XErratum is applicable.
Errata Overview
Peripheral Short Description
Valid for Silicon Revision
Rev. A Rev. B Rev. C
Date Code >
1207
Date Code >
1208
System Clock and
Clock Options
2.2.1 Gain Control of the Crystal
Oscillator X X X
2.2.2 “Disable Clock Source”
Command Remains Enabled X X X
LIN-UART
2.3.1 CRC Calculation of
Diagnostic Frames in LIN 2.x X - -
2.3.2 LIN Break Delimiter X X -
ADC
2.4.1 Comparison Between ADC
Inputs and Voltage References X - -
2.4.2 Register Bits of DIDR1 X - -
ATtiny87/167 Automotive
Silicon Issue Summary
© 2021 Microchip Technology Inc.
and its subsidiaries
Errata DS80000970A-page 2
2. Silicon Errata Issues
2.1 Errata Details
-Erratum is not applicable.
XErratum is applicable.
2.2 System Clock and Clock Options
2.2.1 Gain Control of the Crystal Oscillator
The crystal oscillator (0.4 → 16 MHz) doesn’t latch its gain control (CKSEL/CSEL[2..0] bits):
1. The ‘recover system clock source’ command doesn’t return CSEL[2..0] bits.
2. The gain control can be modified on the fly if CLKSELR changes.
Work Around
1. No work around.
2. As soon as possible, after any CLKSELR modification, re-write the appropriate crystal oscillator setting
(CSEL[3]=1 and CSEL[2..0] / CSUT[1..0] bits) in CLKSELR.
Code example:
; Select crystal oscillator (16MHz crystal, fast rising power)
ldi temp1,((0x0F<<CSEL0)|(0x02<<CSUT0))
sts CLKSELR, temp1
; Enable clock source (crystal oscillator)
ldi temp2,(1<<CLKCCE)
ldi temp3,(0x02<<CLKC0) ; CSEL = "0010"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; Enable crystal oscillator clock
; Clock source switch
ldi temp3,(0x04<<CLKC0) ; CSEL = "0100"
sts CLKCSR,temp2 ; Enable CLKCSR register access
sts CLKCSR,temp3 ; Clock source switch
; Select watchdog clock (128KHz, fast rising power)
ldi temp3,((0x03<<CSEL0)|(0x02<<CSUT0))
sts CLKSELR, temp3 ; (*)
; (*) !!! Loose gain control of crystal oscillator !!!
; ==> WORKAROUND ...
sts CLKSELR, temp1
; ...
Affected Silicon Revisions
Rev. A Rev. B Rev. C
X X X
2.2.2 “Disable Clock Source” Command Remains Enabled
In the dynamic clock switch module, the ‘disable clock source’ command remains running after disabling the targeted
clock source (the clock source is set in the CLKSELR register).
Work Around
After a ‘disable clock source’ command, reset the CLKCSR register by writing .0x80
ATtiny87/167 Automotive
Silicon Errata Issues
© 2021 Microchip Technology Inc.
and its subsidiaries
Errata DS80000970A-page 3
Product specificaties
| Merk: | Microchip |
| Categorie: | Niet gecategoriseerd |
| Model: | ATTINY87 |
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