Texas Instruments SN74CBTLV3251DR Handleiding

Texas Instruments Niet gecategoriseerd SN74CBTLV3251DR

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SCDS054I − MARCH 1998 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D5-Ω Switch Connection Between Two Ports

DRail-to-Rail Switching on Data I/O Ports

DIoff Supports Partial-Power-Down Mode

Operation

DLatch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

GND

VCC

D, DBQ, DGV, OR PW PACKAGE

(TOP VIEW)

NC − No internal connection

RGY PACKAGE

(TOP VIEW)

1 16

8 9

S2 V

GND

NC − No internal connection

description/ordering information

The SN74CBTLV3251 device is a 1-of-8 high-speed FET multiplexer/demultiplexer. The low on-state resistance

of the switch allows connections to be made with minimal propagation delay.

The select inputs (S0, S1, S2) control the data ow. The FET multiplexers/demultiplexers are disabled when

the output-enable (OE) input is high.

This device is fully specied for partial-power-down applications using Ioff. The Ioff feature ensures that

damaging current will not backflow through the device when it is powered down. The device has isolation during

power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

APACKAGE†ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QFN − RGY Tape and reel SN74CBTLV3251RGYR CL251

SOIC D

Tube SN74CBTLV3251D

CBTLV3251

40° °C to 85 C

SOIC − D Tape and reel SN74CBTLV3251DR CBTLV3251

−40° °C to 85 C SSOP (QSOP) − DBQ Tape and reel SN74CBTLV3251DBQR CL251

TSSOP − PW Tape and reel SN74CBTLV3251PWR CL251

TVSOP − DGV Tape and reel SN74CBTLV3251DGVR CL251

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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SCDS054I − MARCH 1998 − REVISED OCTOBER 2003

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

FUNCTION TABLE

INPUTS

FUNCTION

OE S2 S1 S0

FUNCTION

L L L L A port = B1 port

L L L H A port = B2 port

L L H L A port = B3 port

L L H H A port = B4 port

L H L L A port = B5 port

L H L H A port = B6 port

L H H L A port = B7 port

L H H H A port = B8 port

H X X X Disconnect

logic diagram (positive logic)

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SCDS054I − MARCH 1998 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

simplified schematic, each FET switch

(OE)

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †

Supply voltage range, VCC −0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) −0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IK (VI/O < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DBQ package 90°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DGV package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 3): RGY package 39°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg −65° °C to 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

3. The package thermal impedance is calculated in accordance with JESD 51-5.

recommended operating conditions (see Note 4)

MIN MAX UNIT

VCC Supply voltage 2.3 3.6 V

High level control input voltage

VCC = 2.3 V to 2.7 V 1.7

VIH High-level control input voltage VCC = 2.7 V to 3.6 V 2 V

L l l t l i t lt

VCC = 2.3 V to 2.7 V 0.7

VIL Low-level control input voltage VCC = 2.7 V to 3.6 V 0.8 V

TAOperating free-air temperature −40 85 C°

NOTE 4: All unused control inputs of the device must be held at V

CC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Product specificaties

Merk:	Texas Instruments
Categorie:	Niet gecategoriseerd
Model:	SN74CBTLV3251DR
Breedte:	10 mm
Diepte:	4 mm
Hoogte:	1.5 mm
Breedte verpakking:	336.1 mm
Diepte verpakking:	340.5 mm
Hoogte verpakking:	32 mm
Soort:	Logic IC
Type verpakking:	SOIC
Aantal per verpakking:	2500 stuk(s)
Temperatuur bij opslag:	-65 - 150 °C
Bedrijfstemperatuur (T-T):	-40 - 85 °C
Aantal pinnen:	16
Breedte (met pennen):	10 mm
Diepte (met pennen):	6.2 mm
Hoogte (met pennen):	1.75 mm