Texas Instruments CD74HCT4538M96 Handleiding


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1
Data sheet acquired from Harris Semiconductor
SCHS123E
Features
Retriggerable/Resettable Capability
Trigger and Reset Propagation Delays Independent of
RX, CX
Triggering from the Leading or Trailing Edge
Q and Q Buered Outputs Available
Separate Resets
Wide Range of Output Pulse Widths
Schmitt Trigger Input on A and B Inputs
Retrigger Time is Independent of CX
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55oC to 125oC
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il µ1 A at VOL, VOH
Pinout
CD54HC4538, CD54HCT4538
(CERDIP)
CD74HC4538
(PDIP, SOIC, SOP, TSSOP)
CD74HCT4538
(PDIP, SOIC)
TOP VIEW
Description
The ’HC4538 and ’HCT4538 are dual
retriggerable/resettable monostable precision multivibrators
for fixed voltage timing applications. An external resistor
(RX ) and an external capacitor (CX ) control the timing and
the accuracy for the circuit. Adjustment of RX and CX
provides a wide range of output pulse widths from the Q and
Q terminals. The propagation delay from trigger input-to-
output transition and the propagation delay from reset input-
to-output transition are independent of R
X and CX.
Leading-edge triggering (A) and trailing edge triggering (B)
inputs are provided for triggering from either edge of the
input pulse. An unused “A” input should be tied to GND and
an unused B should be tied to VCC . On power up the IC is
reset. Unused resets and sections must be terminated. In
normal operation the circuit retriggers on the application of
each new trigger pulse. To operate in the non-triggerable
mode Q is connected to B when leading edge triggering (A)
is used or Q is connected to A when trailing edge triggering
( B) is used. The period ( ) can be calculated from = (0.7)τ τ
RX, CX; RMIN is 5k . CMIN is 0pF.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
1C
X
1R
X
C
X
1R
1A
1B
1Q
GND
1Q
V
CC
2R
X
C
X
2R
2A
2B
2Q
2Q
2C
X
Ordering Information
PART NUMBER
TEMP. RANGE
(o C) PACKAGE
CD54HC4538F3A -55 to 125 16 Ld CERDIP
CD54HCT4538F3A -55 to 125 16 Ld CERDIP
CD74HC4538E -55 to 125 16 Ld PDIP
CD74HC4538M -55 to 125 16 Ld SOIC
CD74HC4538MT -55 to 125 16 Ld SOIC
CD74HC4538M96 -55 to 125 16 Ld SOIC
CD74HC4538NSR -55 to 125 16 Ld SOP
CD74HC4538PW -55 to 125 16 Ld TSSOP
CD74HC4538PWR -55 to 125 16 Ld TSSOP
CD74HC4538PWT -55 to 125 16 Ld TSSOP
CD74HCT4538E -55 to 125 16 Ld PDIP
CD74HCT4538M -55 to 125 16 Ld SOIC
CD74HCT4538MT -55 to 125 16 Ld SOIC
CD74HCT4538M96 -55 to 125 16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
CD54HC4538, CD74HC4538,
CD54HCT4538, CD74HCT4538
High-Speed CMOS Logic Dual Retriggerable
Precision Monostable Multivibrator
[ /Title
(CD54
HC453
8,
CD74
HC453
8,
CD74
HCT45
38)
/Sub-
ject
(High
Speed
CMOS
Logic
June 1998 - Revised October 2003
2
Functional Diagram
2R
13
2A
12
11
10
9
2Q
2Q
2B
MONO 2
VCC
15 14
2Cx 2RxCx
1R
3
1A
5
46
7
1Q
1Q
1B
MONO 1
VCC
1 2
1Cx 1RxCx
1Cx 1Rx
2Cx 2Rx
GND = 8
VCC = 16
TRUTH TABLE
INPUTS OUTPUTS
R A B Q Q
L X X L H
X H X L H
X X L L H
H L
H H
H = High Level, L = Low Level, = Transition from Low to High,
= Transition from High to Low, One High Level Pulse,
One Low Level Pulse, X = Irrelevant. FIGURE 1. FF DETAIL
CL
CL
CL
CL
p
n
p
n
p
n
CL
R1
R2
CL
R1
Q
Q
CL
D
CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538
3
FIGURE 2. LOGIC DIAGRAM (1 MONO)
FUNCTIONAL TERMINAL CONNECTIONS
FUNCTION
VCC TO
TERMINAL NUMBER
GND TO
TERMINAL NUMBER
INPUT PULSE TO
TERMINAL NUMBER
OTHER
CONNECTIONS
MONO1MONO2MONO 1MONO2MONO 1MONO2MONO1MONO2
Leading-Edge
Trigger/Retriggerable
3, 5 11, 13 4 12
Leading-Edge
Trigger/Non-Retriggerable
3 13 4 12 5-7 11-9
Trailing-Edge
Trigger/Retriggerable
313412511
Trailing-Edge
Trigger/Non-Retriggerable
3 13 5 11 4-6 12-10
NOTES:
1. A retriggerable one-shot multivibrator has an output pulse width which is extended one full time period (T) after application of the last
trigger pulse.
2. A non-triggerable one-shot multivibrator has a time period (T) referenced from the application of the rst trigger pulse.
FIGURE 3. INPUT PULSE TRAIN FIGURE 4. RETRIGGERABLE MODE
PULSE WIDTH (A MODE)
FIGURE 5. NON-RETRIGGERABLE MODE
PULSE WIDTH
(A MODE)
D
CL CL Q
Q
R2R1
FF
VCC
VCC
RX
CX
2(14)
1(15)
8
R
A
B
3(13)
4(12)
5(11)
VCC
VCC
HIGH Z
VCC
VCC
R1
R2
COMP II
-
+6(10)
7(9)
Q
Q
VCC
16
TT
CD54HC4538, CD74HC4538, CD54HCT4538, CD74HCT4538


Product specificaties

Merk: Texas Instruments
Categorie: Niet gecategoriseerd
Model: CD74HCT4538M96
Breedte: 10 mm
Diepte: 4 mm
Hoogte: 1.5 mm
Breedte verpakking: 336.1 mm
Diepte verpakking: 340.5 mm
Hoogte verpakking: 32 mm
Soort: Logic IC
Type verpakking: SOIC
Aantal per verpakking: 2500 stuk(s)
Temperatuur bij opslag: -65 - 150 °C
Bedrijfstemperatuur (T-T): -55 - 125 °C
Aantal pinnen: 16
Breedte (met pennen): 10 mm
Diepte (met pennen): 6.2 mm
Hoogte (met pennen): 1.75 mm

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