Texas Instruments AWR2544 Handleiding

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AWR2544 Single-Chip 76-81GHz FMCW Radar SoC with Launch-On-Package (LOP)

Waveguide Interface for ADAS Applications

1 Features

•FMCW transceiver

–Integrated PLL, transmitter, receiver, baseband

and ADC

–76 to 81GHz coverage with greater than 4GHz

available bandwidth

–4 receive and 4 transmit channels with

Launch-on-Package (LOP) interface to

antennas

–Per transmit phase shifter

–Ultra-accurate chirp engine based on fractional

PLL

–TX power

•+12.5dBm

–RX noise figure

•+12.5dB

–Phase noise (@ 1MHz)

•-96dBc/Hz (76 to 77GHz)

•-95dBc/Hz (76 to 81GHz)

•Built-in calibration and self-test

–Built in firmware (ROM)

–Self-calibrating system across process and

temperature

•Processing elements

–Arm

®

Cortex-R5F

®

core (supports lock step

operation) at 300MHz

–TI radar hardware accelerator (HWA1.5) for

operations like FFT, interference mitigation, and

memory compression

–Multiple EDMA instances for data movement

•Host interface

–10/100/1000Mbps RGMII/RMII/MII Ethernet

–25MHz clock output for Ethernet PHY clocking

•Supports a serial flash memory interface (loading

user application from QSPI flash memory)

•Other interfaces available to user application

–Up to 4 ADC channels

–1 SPI

–2 UARTs

–I

2

C

–GPIOs

–3 EPWMs

–2-lane LVDS interface for raw ADC data and

debug instrumentation

•On-Chip RAM

–2MB

–Memory space split between MCU and shared

L3

•Device security (on select part numbers)

–Programmable embedded hardware security

module (HSM)

–Secure authenticated and encrypted boot

support

–Customer programmable root keys, symmetric

keys (256 bit), asymmetric keys (up to RSA-4K

or ECC-512) with key revocation capability

–Cryptographic hardware accelerators: PKA with

ECC, AES (up to 256 bit), SHA (up to 512 bit),

TRNG/DRBG

•Functional safety compliant targeted

–Developed for functional safety applications

–Documentation available to aid ISO26262

functional safety system design

–Hardware integrity up to ASIL B targeted

•AEC-Q100 qualified

•Advanced features

–Embedded self-monitoring with no external

processor involvement

–Embedded interference detection capability

•Power management

–On-die LDO network for enhanced PSRR

–LVCMOS IO supports dual voltage 3.3V and

1.8V

•Clock source

–40MHz or 50MHz crystal with internal oscillator

–Supports external oscillator/driven clock at

40MHz or 50 MHz

•Power Management

–Recommended LP8772-Q1 Power

Management IC (PMIC)

•Companion PMIC specially designed to

meet device power supply requirements

•Flexible mapping and factory programmed

configurations to support different use cases

•Cost-reduced hardware design

–0.65mm pitch, 12.4mm × 12mm FCCSP

package

–Small size

•Supports automotive temperature operating range

–Operating junction temperature range: –40°C to

+140°C

AWR2544

SWRS314B – JANUARY 2024 – REVISED DECEMBER 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Product specificaties