Microchip SY58011U Handleiding
Microchip
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SY58011U
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DESCRIPTION
■Precision, fully dierential 1:2 fanout buer family
• SY58011U—7GHz any di. input-to-CML
outputs
• SY58012U—5GHz any di. input-to-800mV
LVPECL outputs
• SY58013U—6GHz any di. input-to-400mV
LVPECL outputs
■Guaranteed AC performance over temperature and
voltages
■Low jitter performance
• <10psp-p total jitter (clock)
• <1psrms random jitter (data)
• <10psp-p deterministic jitter (data)
■Fully dierential inputs/outputs
■Accepts an input signal as low as 100mV
■Unique input termination and V T pin accepts
DC-coupled and AC-coupled dierential inputs:
LVPECL, LVDS, and CML
■Power supply 2.5V ±5% and 3.3V ±10%
■Industrial –40°C to +85 C temperature range°
■Available in 16-pin (3mm ××
××
× 3mm) MLF™ package
FEATURES
5GHz-7GHz LVPECL, CML
1:2 FANOUT BUFFERS with
INTERNAL TERMINATION
Precision Edge™
SY58011/12/13U
EVALUATION BOARD
Rev.: A Amendment: /0
Issue Date: November 2003
The SY58011U, SY58012U and SY58013U are
2.5V/3.3V precision, high-speed, fully differential 1:2 fanout
buffers with CML, LVPECL, and 400mV LVPECL outputs.
The SY58011U can process clock signals as fast as 7GHz,
whereas, the SY58012U can process clock signals as fast
as 5GHz, and the SY58013U can process clocks signals as
fast as 6GHz.
The SY58011U, SY58012U and SY58013U include
Micrel’s unique, 3-pin input termination architecture that
allows the devices to directly interface to any differential
signal (AC-coupled or DC-coupled) without any level-shifting
or termination resistor network in the signal path.
This documentation provides design and implementation
information, and a detailed description of the SY58011U,
SY58012U, and SY58013U evaluation boards. The
evaluation boards are intended to provide a convenient test
and evaluation platform for all three devices.
All data sheets and support documentation can be found
on Micrel’s web site at www.micrel.com.
■All SONET and all GigE clock distribution
■Fibre Channel clock and data distribution
■Backplanes
■Data distribution: OC-48, OC-48+FEC, XAUI
■High-end, low skew, multiprocessor synchronous
clock distribution
APPLICATIONS
Precision Edge is a trademark of Micrel, Inc.
Micro
LeadFrame and MLF are trademarks of Amkor Technology, Inc.

2
SY58011/12/13U Evaluation Board
Micrel
V
CC
TRIG IN
GND
V
EE
SY58011U
Agilent 86100A
Wide bandwidth
Oscilloscope DCA
IN /IN
Agilent 83752A
0.01GHz to 20GHz
Synthersizer Sweeper
HP 70004A
Display
RFOUT
CLK_IN
TRIG/CLKCLK
Agilent 70843A
0.1Gbps to 12Gbps
Error Performance
Analyzer
HP Power Supply
E3620
V
CC
= +3.3V
IN
/IN
Q1
/Q1
Q0
/Q0
Figure 1. SY58011U Evaluation Board and DC-Coupled Test Setup
(Eye Diagram and tpd Setup)
V
CC
TRIG IN
GND
V
EE
SY58011U
Agilent 86100A
Wide bandwidth
Oscilloscope DCA
IN /IN
Agilent 83752A
0.01GHz to 20GHz
Synthersizer Sweeper
HP 70004A
Display
RFOUT
CLK_IN
TRIG/CLKCLK
Agilent 70843A
0.1Gbps to 12Gbps
Error Performance
Analyzer
HP Power Supply
E3620
V
CC
= +3.3V
IN
/IN
Q1
/Q1
Q0
/Q0
Figure 2. SY58011U Evaluation Board and AC-Coupled Test Setup
(Eye Diagram and tpd Setup)

3
SY58011/12/13U Evaluation BoardMicrel
V
CC
TRIG IN
V
EE
SY58012/13U
GND
Agilent 86100A
Wide bandwidth
Oscilloscope DCA
IN /IN
Agilent 83752A
0.01GHz to 20GHz
Synthersizer Sweeper
HP 70004A
Display
RFOUT
CLK_IN
TRIG/CLKCLK
Agilent 70843A
0.1Gbps to 12Gbps
Error Performance
Analyzer
HP Power Supply
E3620
VCC = +2V VCC = +1.2V
IN
/IN
Q1
/Q1
Q0
/Q0
Figure 3. SY58012/13U Evaluation Board and DC-Coupled Test Setup
(Eye Diagram and t pd Setup)
V
CC
TRIG IN
V
EE
SY58012/13U
GND
Agilent 86100A
Wide bandwidth
Oscilloscope DCA
IN /IN
Agilent 83752A
0.01GHz to 20GHz
Synthersizer Sweeper
HP 70004A
Display
RFOUT
CLK_IN
TRIG/CLKCLK
Agilent 70843A
0.1Gbps to 12Gbps
Error Performance
Analyzer
HP Power Supply
E3620
VCC = +3.3V
IN
/IN
Q1
/Q1
Q0
/Q0
Figure 4. SY58012/13U Evaluation Board and AC-Coupled Test Setup
(Eye Diagram and t pd Setup)
Product specificaties
Merk: | Microchip |
Categorie: | Niet gecategoriseerd |
Model: | SY58011U |
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