Microchip HV257DB2 Handleiding

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Supertex inc.

Supertex inc.

www.supertex.com

HV257DB2

Doc.# DSDB-HV257DB1

B032114

General Description

The Supertex HV257DB2 is a 32-Channel, 295V, sample

and hold amplier array with a nominal gain of 72V/V. The

purpose of the HV257DB2 is to provide a means to easily

evaluate the Supertex HV257FG device. A high voltage

supply, VPP

, and four low voltage supplies, AVDDand DVDD,

AVNNand DVNN, are required. Referring to the demo board

drawing shown below, the logic and VSIG connections are

on the left, the high voltage outputs are on the bottom, and

the supplies are on the right. Please follow the power up/

down sequence to avoid damaging the device.

High Voltage Sample and Hold Amplier Array

Specications

Parameter Value

VPP

, High voltage supply: 300V

AVDD / DVDD, Low voltage positive supply6.0 to 7.5V:

AVNN / DVNN, Low voltage negative supply-4.5 to -6.5V:

VSIG, Input signal range0 to 5.0V:

HVOUT, Output voltage swing0 to 295V

AV

, Closed loop gain72V/V ±5%

SR, Output slew rate into 100pF load2.0V/µs

Power Up/Down Sequence

The device can be damaged due to improper power up/down

sequence. To prevent damage, please follow the acceptable

power up/down sequences. Two external diodes, D1 and

D2, are added in the demo board to prevent damage dur-

ing power Up/Down. The rst diode is a high voltage diode

across VPP and AVDD. Any low current high voltage diode can

be used. The second diode can be any low voltage schottky

diode across AVNN and GND.

Acceptable Power Up Sequences

1) VPP2) VNN 3) VDD 4) Inputs & Anode

or

1) VNN

2) VDD 3) VPP 4) Inputs & Anode

Acceptable Power Down Sequences

1) Inputs & Anode 2) VDD 3) VNN 4) VPP

or

1) Inputs & Anode 2) VPP 3) VDD4) VNN

Inputs and Outputs

The output of the HV257FG will swing from 0 to 295V. The

internal closed loop gain is set at 72V/V. An input voltage of

4.096V will give an output of 295V. Input voltages of up to

5.0V can be applied but will cause the amplier to saturate.

When EN is high, the addressed output, determined by A0 to

A4, will be sampling the input signal VSIG. When EN is low,

all the internal sampling switches are open.

The output current source and sink for all 32 channels can

be adjusted using R1 and R2. The limit is approximately

12.5V divided by the resistor value. The demo board uses

24.9kΩ for ±500µA limiting.

Temperature Diode

The HV257FG has an integrated silicon diode to help moni-

tor the die temperature if desired. Pin 95 is the anode and

pin 96 is the cathode. Pads are available on the board for

these connections.

HV257DB2

DGND

DVDD

DVNN

AGND

No Connect

AVDD

AVNN

VPP

EN

A0

A1

A2

A3

A4

VSIG

VSGND

HVOUT0

HVOUT31

C1

C2

C3

C4

C5

D1

R3

U1

HV257

pin1

C6

C9

C7

C8

R1 R2

D2

C10

Supertex inc.

Board Layout and Connections

Product specificaties