Microchip ATF1500AL Handleiding

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TQFP

Top View

1

2

3

4

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7

8

9

10

11

33

32

31

30

29

28

27

26

25

24

23

I/O

I/O

I/O

GND

I/O

I/O

I/O

I/O

VCC

I/O

I/O

I/O

I/O

I/O

I/O

VCC

I/O

I/O

I/O

I/O

GND

I/O

44

43

42

41

40

39

38

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36

35

34

12

13

14

15

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I/O

I/O

I/O

I/O

GND

VCC

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O/PD

VCC

OE2/I

GCLR/I

OE1/I

CLK/I

GND

I/O

I/O

PLCC

Top View

7

8

9

10

11

12

13

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16

17

39

38

37

36

35

34

33

32

31

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29

I/O

I/O

I/O

GND

I/O

I/O

I/O

I/O

VCC

I/O

I/O

I/O

I/O

I/O

I/O

VCC

I/O

I/O

I/O

I/O

GND

I/O

6

5

4

3

2

1

44

43

42

41

40

18

19

20

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28

I/O

I/O

I/O

I/O

GND

VCC

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O/PD

VCC

OE2/I

GCLR/I

OE1/I

CLK/I

GND

I/O

I/O

Pin Configurations

Pin

Name Function

CLK Clock

ILogic Inputs

I/O Bi-directional

Buffers

GCLR Register Reset

(active low)

OE1,

OE2

Output Enable

(active low)

VCC+5V Supply

PD Power-down

(active high)

Features

•High-density, High-performance Electrically-erasable Complex

Programmable Logic Device

–44-pin, 32 I/O CPLD

–7.5 ns Maximum Pin-to-pin Delay

–Registered Operation Up to 125 MHz

–Fully Connected Input and Feedback Logic Array

–Backward Compatibility with ATF1500/L Software and Hardware

•Flexible Logic Macrocell

–D/T/Latch Configurable Flip-flops

–Global and Individual Register Control Signals

–Global and Individual Output Enable

–Programmable Output Slew Rate

•Advanced Power Management Features

–Automatic 3 mA Standby (ATF1500AL)

–Pin-controlled 10 mA Standby Mode

–Programmable Pin-keeper Inputs and I/Os

•Available in Commercial and Industrial Temperature Ranges

•Available in 44-lead PLCC and TQFP Packages

•Advanced Flash Technology

–100% Tested

–Completely Reprogrammable

–100 Program/Erase Cycles

–20 Year Data Retention

–2000V ESD Protection

–200 mA Latch-up Immunity

•Supported by Popular third-arty Tools

•Security Fuse Feature

•Pin-compatible with the Most Commonly Used Devices

•Green (Pb/Halide-fee/RoHS Compliant) Package Options

Description

The ATF1500A is a high-performance, high-density complex PLD. Built on an

advanced Flash technology, it has maximum pin-to-pin delays of 7.5 ns and supports

sequential logic operation at speeds up to 125 MHz. With 32 logic macrocells and up

to 36 inputs, it easily integrates logic from several TTL, SSI, MSI and classic PLDs.

The ATF1500A’s global input and feedback architecture simplifies logic placement

and eliminates pinout changes due to design changes.

High-

performance

EPLD

ATF1500A

ATF1500AL

Rev. 0759F–6/05

(continued)

Product specificaties