Texas Instruments CD74HCT597M96 Handleiding

Texas Instruments Niet gecategoriseerd CD74HCT597M96

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Data sheet acquired from Harris Semiconductor

SCHS191C

Features

• Buered Inputs

• Asynchronous Parallel Load

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il≤µ1 A at VOL, VOH

Description

The ’HC597 and CD74HCT597 are high-speed silicon gate

CMOS devices that are pin-compatible with the LSTTL 597

devices. Each device consists of an 8-flip-flop input register

and an 8-bit parallel-in/serial-in, serial-out shift register. Each

load input (PL) shifts parallel stored data asynchronously into

the shift register. A “low” master input (MR) clears the shift

through the shift register when PL is high.

Pinout

CD54HC597

(CERDIP)

CD74HC597

(PDIP, SOIC, SOP)

CD74HCT597

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER TEMP. RANGE (oC) PACKAGE

CD54HC597F3A -55 to 125 16 Ld CERDIP

CD74HC597E -55 to 125 16 Ld PDIP

CD74HC597M -55 to 125 16 Ld SOIC

CD74HC597MT -55 to 125 16 Ld SOIC

CD74HC597M96 -55 to 125 16 Ld SOIC

CD74HC597NSR -55 to 125 16 Ld SOP

CD74HCT597E -55 to 125 16 Ld PDIP

CD74HCT597M -55 to 125 16 Ld SOIC

CD74HCT597MT -55 to 125 16 Ld SOIC

CD74HCT597M96 -55 to 125 16 Ld SOIC

NOTE: When ordering, use the entire part number. The sufﬁxes 96

and R denote tape and reel. The sufﬁx T denotes a small-quantity

reel of 250.

GND

VCC

STCP

SHCP

January 1998 - Revised October 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

CD54HC597, CD74HC597,

CD74HCT597

High-Speed CMOS Logic

8-Bit Shift Register with Input Storage

[ /Title

(CD74

HC597

CD74

HCT59

/Sub-

ject

(High

Speed

CMOS

Functional Diagram

STCP

SHCP

8 F/F

STORAGE

REG.

8-BIT

SHIFT

REG.

PARALLEL

DATA

INPUTS

FUNCTION TABLE

STCP SHCP PL MR FUNCTION

↑X X X Data Loaded to Input Flip-Flops

↑X L H Data Loaded from Inputs to Shift Register

No Clock Edge X L H Data Transferred from Input Flip-Flops to Shift Register

X X L L Invalid Logic, State of Shift Register Indeterminate when

Signals Removed

X X H L Shift Register Cleared

X H H Shift Register Clocked Qn = Qn-1, Q0 = D↑S

H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, = Transition from Low to High CP Level↑

CD54HC597, CD74HC597, CD74HCT597

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

DC Input Diode Current, IIK

For VI < -0.5V or VI > VCC + 0.5V 20mA. . . . . . . . . . . . . . . . . . . . . .±

DC Output Diode Current, IOK

For VO < -0.5V or V

O > VCC + 0.5V 20mA . . . . . . . . . . . . . . . . . . . . ±

DC Drain Current, per Output, I

For -0.5V < VO < V

CC + 0.5V 25mA. . . . . . . . . . . . . . . . . . . . . . . . . . ±

DC Output Source or Sink Current per Output Pin, I

For VO > -0.5V or V

O < VCC + 0.5V 25mA . . . . . . . . . . . . . . . . . . . . ±

DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA

Operating Conditions

Temperature Range, T

A . . . . . . . . . . . . . . . . . . . . . . -55

oC to 125oC

Supply Voltage Range, V

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V

DC Input or Output Voltage, V

I, VO . . . . . . . . . . . . . . . . . 0V to VCC

Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)

4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

Thermal Resistance (Typical, Note 1) θ

JA (oC/W)

E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . 67

M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . 73

NS (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . 64

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150

Maximum Storage Temperature Range . . . . . . . . . .-65

oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. The package thermal impedance is calculated in accordance with JESD 51-7.

DC Electrical Speciﬁcations

PARAMETER SYMBOL

TEST

CONDITIONS VCC

(V)

25oC -40oC TO 85oC -55oC TO 125oC

UNITSVI(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX

HC TYPES

High Level Input

Voltage

VIH - - 2 1.5 - - 1.5 - 1.5 - V

4.5 3.15 - - 3.15 - 3.15 - V

6 4.2 - - 4.2 - 4.2 - V

Low Level Input

Voltage

VIL - - 2 - - 0.5 - 0.5 - 0.5 V

4.5 - - 1.35 - 1.35 - 1.35 V

6 - - 1.8 - 1.8 - 1.8 V

High Level Output

Voltage

CMOS Loads

VOH VIH or VIL -0.02 2 1.9 - - 1.9 - 1.9 - V

-0.02 4.5 4.4 - - 4.4 - 4.4 - V

-0.02 6 5.9 - - 5.9 - 5.9 - V

High Level Output

Voltage

TTL Loads

- - - - - - - - - V

-4 4.5 3.98 - - 3.84 - 3.7 - V

-5.2 6 5.48 - - 5.34 - 5.2 - V

Low Level Output

Voltage

CMOS Loads

VOL VIH or VIL 0.02 2 - - 0.1 - 0.1 - 0.1 V

0.02 4.5 - - 0.1 - 0.1 - 0.1 V

0.02 6 - - 0.1 - 0.1 - 0.1 V

Low Level Output

Voltage

TTL Loads

- - - - - - - - - V

4 4.5 - - 0.26 - 0.33 - 0.4 V

5.2 6 - - 0.26 - 0.33 - 0.4 V

Input Leakage

Current

IIVCC or

GND

- 6 - - ± ± ± µ0.1 - 1 - 1 A

CD54HC597, CD74HC597, CD74HCT597

Product specificaties

Merk:	Texas Instruments
Categorie:	Niet gecategoriseerd
Model:	CD74HCT597M96
Breedte:	10 mm
Diepte:	4 mm
Hoogte:	1.5 mm
Breedte verpakking:	336.1 mm
Diepte verpakking:	340.5 mm
Hoogte verpakking:	32 mm
Soort:	Logic IC
Type verpakking:	SOIC
Aantal per verpakking:	2500 stuk(s)
Temperatuur bij opslag:	-65 - 150 °C
Bedrijfstemperatuur (T-T):	-55 - 125 °C
Aantal pinnen:	16
Breedte (met pennen):	10 mm
Diepte (met pennen):	6.2 mm
Hoogte (met pennen):	1.75 mm